Design Hardening of Commercial Technologies
Most of today’s advanced nanoelectronic device technologies are being developed in the commercial sector, where performance and power are typically optimized, trading away temperature range and component reliability. Commercial semiconductor road maps show component reliability timescales are being reduced to 5–7 years, more closely aligning with commercial product life cycles of 2–3 years. This approach is simply not geared toward the development of space electronics, which require long lifetimes, high reliability, extended temperature range, and radiation hardness.
At The Aerospace Corporation, researchers are studying two main approaches to applying nanoscale CMOS technology to space applications—radiation hardness by design (HBD), and reliability by design (RBD). The goals are to enable developers of integrated circuits to improve the intrinsic reliability and radiation tolerance of the commercial processes to meet space-use requirements. In these techniques, physical layout, circuit design, and system-level designs are used to mitigate radiation-induced failure modes and wear-out conditions. (see sidebar, The A8 Research Center)
Radiation Hardness by Design
Hardness by design has been under active research development at Aerospace since the late 1990s. More recently, a Defense Advanced Research Projects Agency (DARPA) program, begun in the mid-2000s, has greatly advanced the technology and reduced to practice complex radiation-hardened, application-specific integrated circuit (ASIC) designs targeting 90 and 45 nm technologies. An example of HBD using a physical layout modification would be to interleave the individual bits in a word stored in memory so that a single-event upset from a galactic cosmic ray would cause no more than one bit of error. This technique can be complemented by a circuit-level modification of the design to make it less sensitive to transient charge deposition within the memory bit from those same energetic particles. Error detection and correction can also be applied at higher circuit levels so that with additional bits per memory word, any upset-induced bit errors can be automatically corrected on readout. Finally, system-level mitigations can be applied by using a background memory-scrubbing function, such that single bit errors do not accumulate in the memory over time. Together, these techniques have been shown to be effective at hardening commercial memories to the levels required for space applications. Similar HBD approaches can be used to handle other radiation effects, including single-event transients, single-event latchup, and total ionizing dose.
Reliability by Design
Space systems developers who choose to use an unqualified technology must begin by reviewing the commercial qualification data and performing independent testing to understand all failure modes in the intended environment. This prequalification study enables the use of HBD and RBD techniques to mitigate known failure modes. Developers must also perform formal qualification testing to validate their designs and demonstrate requirements closure with an end-of-life design margin.
Unfortunately, shortfalls can exist as new technologies are incorporated into critical space systems. These shortfalls can include gaps in the understanding of basic failure mechanisms, inadequate application of nanoscale chemistry and physics to fully understand device reliability, and the unavailability of complete qualification data corresponding to the space system’s actual operating conditions and environment. Although a tremendous amount of proprietary process and reliability data is generated during commercial qualification, it is often difficult to obtain all of that data, or the data may not extend to the temperature ranges or lifetimes required for a space application. Furthermore, no data may initially exist for space-specific environmental factors, such as radiation or cryogenic operation.
A comprehensive framework to develop and effectively integrate RBD approaches into space development cycles has not been completely formalized. There are, however, research efforts under way at Aerospace and elsewhere to tackle the challenges of developing a rigorous RBD approach to ensure nanoelectronic device reliability for long space missions (more than 15 years). Methods include modifying the integrated circuit design at the physical layout level, developing circuit and system design reliability trades, and improving thermal management of critical junction temperatures. Novel approaches are being investigated that build upon the intrinsic reliability of commercial technologies to meet high reliability requirements for national security space programs.
In each of these design-hardening approaches, the implicit goal is to trade away a small amount of performance, power, and/or device area for increased radiation robustness and extended lifetime. System designers are typically willing to perform this trade as long as the total loss in device performance is effectively no more than one or two technology generations (~2 to 4 years). The net result of using HBD and RBD techniques for space systems is to maintain radiation robustness and high reliability while providing an improvement in circuit density and throughput with lower power using commercial state-of-the-art technology. As new nanoelectronic technologies beyond CMOS emerge, HBD and RBD will become recurring themes needed to manage the technology gap between commercial terrestrial and military space qualification requirements. A new government-led program, the National High Reliability Electronics Virtual Center (HiREV), has been established to address the physics of failure and prequalification of emerging nanoelectronic technology. The HiREV program is supported within Aerospace by various organizations, which provide program guidance, reliability science, and prequalification data for new nanoelectronic device technologies.